This symbol is a type alias.
Source:
POSSIBLE_FSIM_GATES = Union[
cirq.ops.fsim_gate.FSimGate,
cirq.ops.fsim_gate.PhasedFSimGate,
cirq.ops.swap_gates.ISwapPowGate,
cirq.ops.phased_iswap_gate.PhasedISwapPowGate,
cirq.ops.common_gates.CZPowGate,
cirq.ops.identity.IdentityGate
]